Patents

  • Efficient Sparse Matrix-Vector Multiplication on Parallel Processors
    Mayank Daga, Joseph L. Greathouse
    Patent: Google Patents | PDF
    Patent Number: US 9,697,176
    Granted: July 4, 2017
  • Randombly Branching Using Hardware Watchpoints
    Joseph L. Greathouse, David S. Christie
    Patent: Google Patents | PDF
    Patent Number: US 9,483,379
    Granted: November 1, 2016
  • Randomly Branching Using Performance Counters
    Joseph L. Greathouse, David S. Christie
    Patent: Google Patents | PDF
    Patent Number: US 9,448,909
    Granted: September 20, 2016
  • User-level Hardware Branch Records
    Joseph L. Greathouse, Anton Chernoff
    Patent: Google Patents | PDF
    Patent Number: US 9,372,733
    Granted: June 21, 2016

Invited Talks

  • Accelerating Dynamic Software Analyses
    Given at Microsoft Research on February 20, 2012
    Video available here
    Presentation: PPTX | PPT | PDF
  • On-Demand Dynamic Software Analysis
    Given for the AMD Tech Topics Series on December 12, 2011
    Presentation: PPTX | PPT | PDF
  • Hardware Support for On-Demand Software Analysis
    Given for the 2011 CSE Graduate Student Honors Competition on December 8, 2011
    Video available here
    Presentation: PPTX | PPT | PDF
  • Accelerating Dynamic Software Analyses
    Given at Microsoft Research, Silicon Valley, on December 2, 2011
    Presentation: PPTX | PPT | PDF
  • Accelerating Dynamic Software Analyses
    Given at VMware on December 1, 2011
    Presentation: PPTX | PPT | PDF
  • On-Demand Dynamic Software Analysis
    Given at Intel Labs, Santa Clara on November 29, 2011
    Presentation: PPTX | PPT | PDF
  • Sampling Dynamic Dataflow Analyses
    Given at the University of British Columbia Computer Science Department on June 10, 2011
    Presentation: PPTX | PPT | PDF

Posters

  • Scalable Security Vulnerability Analysis via Sampling
    Presented at the 2011 GSRC Annual Symposium, November 16, 2011
    Poster: PDF
  • Testudo: Heavyweight Security Analysis via Statistical Sampling
    Presented at the 2008 University of Michigan Engineering Graduate Symposium, November 2008
    Poster: PDF

Unpublished Works

The following are papers and presentations that I wrote over the course of my graduate studies.
  • Summary Presentation of "Cortical computing with Memristive Nanodevices"
    I presented a summary of this paper about the power of memristors from SciDAC Review at the Adaptive Hardware Reading Group in July 2009
    Presentation: PPTX | PPT | PDF
  • Processors with On-Die Cryptography Accelerators
    This was my final project in EECS 575 during the Winter 2007 semester. It is a survey of cryptography accelerators in the Intel IXP2850, Sun UltraSPARC T1 & T2, and IBM z9.
    Paper: PDF
  • AGEIA PhysX Physics Processing Unit Case Study
    This was a case study presentation done for EECS 573 during the Winter 2007 semester. It looks at the now-defunct Ageia PhysX hardware design. I based this off delving through all of the patents available at that time and from Nicholas Blachford's excellent article.
    Presentation: PPT | PDF
  • A Runtime Metric of Design Confidence
    Ken Zick and I did this research for our EECS 578 final project in the Fall 2006 semester. It is a mechanism to find, at runtime, the best configuration of modules if you are performing N-Version design with the capability to do runtime reconfiguration.
    Paper: PDF
    Presentation: PPT | PDF